Panasonic MN101C77C - Manual (Page 174)

Chapter 4 I/O Ports
IV - 24 Port 5
Figure 4-5-4 Block Diagram (P52)
Figure 4-5-5 Block Diagram (P53)
R
D
L
Q
Reset
Write Read
R
D
L
Q
Reset
Write Read
D
L
Q
Write Read
Read
R
Reset
Pull-up resistor control
I/O direction control
Port output data
SC3MD1 register
SC3SBTS flag
Serial interface 3 clock output
Serial interface 3 clock input
Port input data
Data bus
0
1
P52
P5PLU2
P5DIR2
P5OUT2
P5IN2
Read
R
D
L
Q
Reset
Write
SC3ODC1
Nch open-drain control
M
U
X
R
D
L
Q
Reset
Write Read
R
D
L
Q
Reset
Write Read
D
L
Q
Write Read
Read
R
Reset
Pull-up resistor control
I/O direction control
Port output data
SC4AD1 register
SELI2C flag
Serial interface 4 transmission data output
Serial interface 4 reception data input
Port input data
Data bus
0
1
P53
P5PLU3
P5DIR3
P5OUT3
P5IN3
Read
R
D
L
Q
Reset
Write
SC4ODC10
Nch open-drain control
M
U
X