Panasonic MN101C77C - Manual (Page 294)

Chapter 7 16-bit Timer
VII - 34
16-bit Timer Capture
7-9 16-bit Timer Capture
7-9-1 Operation
The value of a binary counter is stored to register at the timing of the external interrupt input signal, or the
timing of writing operation with an arbitrary value to the capture register.
„ Capture Operation with External Interrupt Signal as a Trigger (Timer 7)
Capture trigger of input capture function is generated at the external interrupt signal that passed through
the external interrupt interface block. The capture trigger is selected by the timer 7 mode register 2
(TM7MD2) and the external interrupt control register (IRQ0ICR, IRQ1ICR, IRQ2ICR, IRQ3ICR).
Here are the capture trigger to be selected and the interrupt flag setup.
Table 7-9-1 Capture Trigger
When capture trigger is activated at both edges of an external interrupt, the high precision pulse width
measurement that measures the width of "H" period and "L" period of input signal constantly, is possible
The external interrupt 2 (IRQ2) and the external interrupt 3 (IRQ3) has the function of both
edges interrupt. But, that function cannot be used when the input capture should be gener-
ated at both edges. [table 7-9-1(*)]
External interrupt n
control register
(IRQnICR)
T7ICT1-0 T7ICEDG REDGn (bp5) EDGSEL3 EDGSEL2
IRQ0 falling edge 00(IRQ0) 1 0 - - IRQ0 falling edge
IRQ0 rising edge 00(IRQ0) 1 1 - - IRQ0 rising edge
0 - - IRQ0 falling edge
1 - - IRQ0 rising edge
IRQ1 falling edge 01(IRQ1) 1 0 - - IRQ1 falling edge
IRQ1 rising edge 01(IRQ1) 1 1 - - IRQ1 rising edge
0 - - IRQ1 falling edge
1 - - IRQ1 rising edge
IRQ2 falling edge 10(IRQ2) 1 0 - 0 IRQ2 falling edge
IRQ2 rising edge 10(IRQ2) 1 1 - 0 IRQ2 rising edge
0 - 0 IRQ2 falling edge
1 - 0 IRQ2 rising edge
IRQ3 falling edge 11(IRQ3) 1 0 0 - IRQ3 falling edge
IRQ3 rising edge 11(IRQ3) 1 1 0 - IRQ3 rising edge
0 0 - IRQ3 falling edge
1 0 - IRQ3 rising edge
0
0
0
0
IRQ2 both edge(*)
IRQ3 both edge(*)
10(IRQ2)
11(IRQ3)
IRQ0 both edge 00(IRQ0)
IRQ1 both edge 01(IRQ1)
Both edges interrupt
control register (EDGDT)
Timer 7 mode register 2
Capture trigger source
Interrupt starting edge of
external interrupt n