Rockwell Automation 1785-Vx0B, D17856.5.9 PLC-5 VME VMEbus Programmable Controllers User Manual - Manual (Page 164)

Sample API Modules
Appendix B
B-6
/* Mask for the command control register’s error bit. */
#define kCMDCTRL_ERR 0x2000
#define kPLC540V_DEFAULT_RESPONSE 0x0000
#define kPLC540V_ENABLE_STATCTRL_SLE 0X8000
#define kPLC540V_DISABLE_STATCTRL_SLE 0x7FFF
/* Offset Register Defines */
#define MK_OFFSET(a) ((unsigned short) (((unsigned long) a & 0x00FF0000) >> 8))
static void poll_plc540v_cmdctrl_bits(ULONG baseAddress,
UWORD andMask,
PLC540V_STATUS_TYPE *status);
/*****************************************************************************
*
* PURPOSE: This function will poll the specified bits (in the andMask)
* in the command control register of the PLC-5/40V until they
* are set or a timeout.
*
* INPUT: ULONG baseAddress contains the base address of the PLC-5/40V.
*
* UWORD andMask contains the bitmask which will be ANDed with
* the command control register in order to determine if the
* bits are set.
*
* OUTPUT: PLC540V_STATUS_TYPE *status will contain the final status
* of requesting this function. This status could be and EPC
* or PLC-5/40V value.
*
* RETURNS: Nothing.
*
* EXAMPLE:
* ULONG baseAddress = 0xFC00;
* UWORD andMask = 0x1;
* PLC540V_STATUS_TYPE *status;
* poll_plc540v_cmdctrl_bits(baseAddress,
* andMask,
* &status);
*
* Copyright Allen-Bradley Company, Inc. 1993
*
****************************************************************************/
static void poll_plc540v_cmdctrl_bits(ULONG baseAddress,
UWORD andMask,
PLC540V_STATUS_TYPE *status)
{
/* A loop counter. */
ULONG i;
/* The value read from the command control register. */
UWORD cmdctlReg = 0;
/* Let’s initialize the status variable to success. */
memset((char *) status, 0x0, sizeof(PLC540V_STATUS_TYPE));