Rockwell Automation 1785-Vx0B, D17856.5.9 PLC-5 VME VMEbus Programmable Controllers User Manual - Manual (Page 46)

Chapter 3
VMEbus Interface
3-8
If you designate: The PLC-5/VME processor accesses the command block as an:
A24 A24 access with the 3D (standard supervisory data access) address modifier.
A16 A16 access with the 2D (short supervisory access) address modifier.
One exception in the situation where A24 is designated:
When you enable the PLC-5/VME processor’s slave memory and the
A24 address resides within the slave memory, the PLC-5/VME
processor accesses the memory locally. Every time the PLC-5/VME
processor is given an A24 address (e.g., of a command, within a
command), it determines whether or not the address falls within its
enabled slave memory. It does not take the implicit or explicit length of
the data item or structure into account.
Important: Data structures must be wholly within or without the
slave memory; data structures cannot be “half in and half out” of the
slave memory.
Also, the PLC-5/VME processor assumes it can do all master accesses to
commands as D16 and D08(EO). For data transfers, D16 versus D08(EO)
is programmable (to allow access to 8-bit I/O devices).
The diagram below shows the remainder of the command structure. The
message points to a command block, which identifies the type of
command. Some commands are wholly contained within the command
block. Others, specifically the PCCC commands, are contained in a
separate command packet. Such commands typically have data returned as
a reply; space for the reply packet is assumed to be allocated by the
sending VME CPU at the end of the command packet.
Address in command register Command block Command packet
Reply packet
4 bytes
32 bytes
4-248 bytes
4-248 bytes
The command-processing state of the PLC-5/VME processor can be
observed in several ways. After a command has been sent, readiness of the
command register indicates that processing of the previous command
has started.
Two ways are provided to detect completion of command processing.
The command block contains a response field into which a success or
error code is placed upon completion of the command. Optionally,
the PLC-5/VME processor can signal an interrupt at the end of
command processing.