Rockwell Automation 1785-Vx0B, D17856.5.9 PLC-5 VME VMEbus Programmable Controllers User Manual - Manual (Page 90)

Chapter 6
PLC-5/VME Processor
Communications Commands
6-21
Error Codes
The STS byte contains 00H if no error. When detected, the PLC-5/VME
processor reports errors in its reply packet as follows:
STS EXT STS Description
00H – No error
F0H 0CH Resource not available—someone else already holds the edit
resource or has set the remote lockout bit
Refer to page D-3 for additional information on PCCC status codes.
Sample API Module
For a sample
interface
header file: Refer to page: For a sample
implementation
source file: Refer to page:
P40VSCM.H B-83 P40VSCM.C B-84
Use this command to place the PLC-5/VME processor in an upload mode
before uploading PLC-5/VME processor memory.
During upload, the PLC-5/VME processor is in upload/program,
upload/run, or upload/remote run mode. The host CPU can verify only
static memory segments if the PLC-5/VME processor is in upload/run or
upload/remote run mode, or if PLC-5/VME processor memory is altered
by message commands from a DH+ station during upload. Do this using
compare segments of memory segment pointers.
A no-privilege error is returned if the requester does not have the privilege
of placing the host in a download mode. This error occurs when:
the processor is being edited
some other node is already downloading to the processing
Important: This command returns information needed by the host CPU to
upload the PLC-5/VME’s processor memory. It returns pointers to
segments of memory that are used to process it sequentially. The result is a
physical image of the processor’s memory that can only be downloaded to
the same processor model, series, and revision. After the upload is
completed, this image must not be modified.
See the “Header Bit/Byte Descriptions” section on page 6-4 for
descriptions of remaining bytes.
For a complete description of the upload algorithm, see page 6-34.
Upload All Request