Irq software interrupt generation, D (see, Figure 99 – Zilog Z86193 User Manual
Page 111

Z8
®
CPU
User Manual
UM001604-0108
Interrupts
104
The proper sequence for programming the interrupt edge select bits is (assumes IPR and
IMR have been previously initialized).
IRQ Software Interrupt Generation
IRQ can be used to generate software interrupts by specifying IRQ as the destination of
any instruction referencing the Z8
®
Standard Register File. These Software Interrupts
(SWI) are controlled in the same manner as hardware generated requests (in other words,
the IPR and the IMR control the priority and enabling of each SWI level).
Table 21. IRQ Register Configuration*
IRQ
Interrupt Edge
D7
D6
P31
P32
0
0
F
F
0
1
F
R
1
0
R
F
1
1
R/F
R/F
*F = Falling Edge; R = Rising Edge.
DI
;Inhibit all interrupts until input edges are
configured.
OR
IRQ,#XX 000000b
;Configure interrupt; do not disturb edges
as required—IRQ 0-5.
EI
;Re-enable interrupts.
Figure 99. IRQ Reset Functional Logic Diagram
S
Interrupt Request Register
(IRQ, FAh)
RESET
El Instruction
POR
R
- Z86233 Z86243 Z86733 Z86743 Z86C02 Z86C04 Z86C08 Z86C15 Z86C21 Z86C30 Z86C31 Z86C33 Z86C36 Z86C40 Z86C43 Z86C61 Z86C62 Z86C63 Z86C65 Z86C83 Z86C90 Z86C91 Z86C93 Z86C96 Z86E02 Z86E03 Z86E04 Z86E06 Z86E07 Z86E08 Z86E15 Z86E21 Z86E30 Z86E31 Z86E33 Z86E34 Z86E40 Z86E43 Z86E44 Z86E61 Z86E63 Z86E83 Z86K15 Z86L02 Z86L04 Z86L08 Z86L16 Z8E000 Z8E001 Z8PE003