Zilog Z86193 - Manual (Page 115)

Z8
®
CPU
User Manual
UM001604-0108 Interrupts
108
longest instruction present in the application program + 2T
P
C (internal synchronization
time).
Nesting of Vectored Interrupts
Nesting of vectored interrupts allows higher priority requests to interrupt a lower priority
request. To initiate vectored interrupt nesting, do the following during the interrupt service
routine:
•
Push the old IMR on the stack
•
Load IMR with a new mask to disable lower priority interrupts
•
Execute EI instruction
•
Proceed with interrupt processing
•
After processing is complete, execute DI instruction
•
Restore the IMR to its original value by returning the previous mask from the stack
•
Execute IRET
Depending on the application, some simplification of the above procedure may be possi-
ble.
Polled Processing
Polled interrupt processing is supported by masking off the IRQ to be polled. This is
accomplished by clearing the corresponding bits in the IMR.
To enable any interrupt, first the interrupt mechanism must be engaged with an EI instruc-
tion. If only polled interrupts are to be serviced, execute:
Figure 102. Z8 Interrupt Acknowledge Timing
PC
For Stack External Only
PC+1 PC PCL SP-1 SP-2 PCH SP-3 FLAGS VECT VECT+1
Even Vector Address
Odd Vector Address
Op Code (Discarded)
VECTH VECTL
First Instruction Of Interrupt Service Routine
For Stack External Only
A0-A7 IN
Internal Clock
AS
/DS
A0-A7 OUT
M3 M1 M2 M1 M2 Stack Push
Fetch
Vector High Fetch
Vector Low
Stack Push Stack Push
R/W