Watchdog timer enable during halt mode – Zilog Z86193 User Manual

Page 256

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Z8

®

CPU

User Manual

UM001604-0108

Instruction Description

249

Watchdog Timer Enable During Halt Mode

Syntax

WDh

Instruction Format

Operation

When this instruction is executed it enables the WDT during HALT mode. If this instruc-
tion is not executed the WDT stops when entering HALT mode. This instruction does not
clear the counter, it just makes it possible to have the WDT function running during HALT
mode. A WDh instruction executed without executing WDT (

5Fh

) has no effect.

The

WDh

instruction should not be used following any instruction in which the condition of

the Flags is important.

Example

If the WDT is enabled, the statement:

WDh

Op Code: .BYTE 4Fh

enables the WDT in HALT mode.

This instruction format is valid only for the Z86C04, Z86C08, Z86E04, Z86E07, and
Z86E08 MCUs.

Cycles

OPC

(Hex)

OPC

6

4F

Flag

Description

Z

Undefined

S

Undefined

V

Undefined

D

Unaffected

H

Unaffected

Note:

Note:

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