Zilog Z86193 - Manual (Page 217)

Z8
®
CPU
User Manual
UM001604-0108 Instruction Description
210
Logical Exclusive OR
Syntax
XOR dst, src
Instruction Format
Operation
dst
←
dst XOR src
The source operand is logically EXCLUSIVE ORed with the destination operand. The
XOR operation results in a 1 being stored in the destination operand whenever the corre-
sponding bits in the two operands are different, otherwise a 0 is stored. The contents of the
source operand are not affected.
Address modes R or IR can be used to specify a 4-bit Working Register. In this format, the
source or destination Working Register operand is specified by adding
1110b
(
Eh
) to the
high nibble of the operand. For example, if Working Register R12 (CH) is the destination
operand, then
ECh
is used as the destination operand in the Op Code.
Cycles
OPC
(Hex)
Address
Mode
dst src
OPC dst src
6 82 r r
6 83 r lr
OPC src dst
10 84 R R
10 85 R IR
OPC dst src
10 86 R IM
10 87 IR IM
C Unaffected
Z Set if the result is zero; cleared otherwise.
S Set if the result of bit 7 is set; cleared otherwise.
V Always reset to 0
D Unaffected
H Unaffected
E src or E dst
Note: