Avago Technologies LSI53C895A User Manual
Page 106
3-18
Signal Descriptions
NC
4, 49, 53, 62,
103–109,
152–159, 177,
192, 207, 208
A2, A6,
A19–A20, B1,
B11, B17–18,
C2–9,
C11–16, C18,
D5, D7,
D9–10, D12,
D14, E2–4,
E18, F18,
G3–4,
G17–18, H3,
H18, J1, J4,
J17, K3,
K17–18, L4,
L18, M4, M17,
P3–4, R3,
T3–4, T17–18,
T20, U3, U5,
U7, U12, U14,
U16, U19, V4,
V10, V14–16,
W3–4, W16,
W18, Y4, Y9,
Y11, Y20
N/A
N/A
These pins have NO internal
connection.
Note:
The I/O driver pad rows and digital core have isolated power supplies as indicated by the “I/O”
and “CORE” extensions on their respective V
SS
and V
DD
names. These power and ground pins
should be connected directly to the primary power and ground planes of the circuit board. Bypass
capacitors of 0.01
µ
F should be applied between adjacent V
SS
and V
DD
pairs wherever possible.
Do not connect bypass capacitors between V
SS
and V
DD
pairs that cross power and ground bus
boundaries.
Table 3.14
Power and Ground Signals (Cont.)
Name
PQFP
BGA Pos
Type
Strength Description