Avago Technologies LSI53C895A - Manual (Page 300)

6-40 Electrical Specifications
Figure 6.25 External Memory Read
1 2 3 4 5 6 7 8 9
CLK
(Driven by System)
PAR
(Driven by Master-Addr;
IRDY/
(Driven by Master)
TRDY/
(Driven by LSI53C895A)
STOP/
(Driven by LSI53C895A)
DEVSEL/
(Driven by LSI53C895A)
AD
(Driven by Master-Addr;
C_BE[3:0]/
(Driven by Master)
FRAME/
(Driven by Master)
LSI53C895A-Data)
LSI53C895A-Data)
MAD
(Addr driven by LSI53C895A;
Data driven by Memory)
MAS1/
(Driven by LSI53C895A)
MAS0/
(Driven by LSI53C895A)
MWE/
(Driven by LSI53C895A)
MOE/
(Driven by LSI53C895A)
MCE/
(Driven by LSI53C895A)
In
CMD
Addr
In
t
1
t
2
t
13
t
12
t
11
Byte Enable
t
1
t
1
t
2
t
2
t
3
t
1
t
2
t
1
Upper
Address
Middle
Address
Lower
Address