Avago Technologies LSI53C895A - Manual (Page 8)

viii Contents
2.2.10 SCSI Loopback Mode 2-26
2.2.11 Parity Options 2-26
2.2.12 DMA FIFO 2-29
2.2.13 SCSI Bus Interface 2-34
2.2.14 Select/Reselect During Selection/Reselection 2-39
2.2.15 Synchronous Operation 2-40
2.2.16 Interrupt Handling 2-43
2.2.17 Interrupt Routing 2-50
2.2.18 Chained Block Moves 2-51
2.3 Parallel ROM Interface 2-55
2.4 Serial EEPROM Interface 2-57
2.4.1 Default Download Mode 2-57
2.4.2 No Download Mode 2-58
2.5 Alternative SSVID/SSID Loading Mechanism 2-58
2.6 Power Management 2-60
2.6.1 Power State D0 2-61
2.6.2 Power State D1 2-61
2.6.3 Power State D2 2-62
2.6.4 Power State D3 2-62
Chapter 3 Signal Descriptions
3.1 LSI53C895A Functional Signal Grouping 3-2
3.2 Signal Descriptions 3-3
3.2.1 Internal Pull-ups on LSI53C895A Signals 3-3
3.3 PCI Bus Interface Signals 3-4
3.3.1 System Signals 3-4
3.3.2 Address and Data Signals 3-5
3.3.3 Interface Control Signals 3-6
3.3.4 Arbitration Signals 3-8
3.3.5 Error Reporting Signals 3-8
3.3.6 Interrupt Signals 3-9
3.3.7 SCSI GPIO Signals 3-10
3.4 SCSI Bus Interface Signals 3-11
3.4.1 SCSI Bus Interface Signal 3-11
3.4.2 SCSI Signals 3-12
3.4.3 SCSI Control Signals 3-13
3.5 Flash ROM and Memory Interface Signals 3-14