Avago Technologies LSI53C895A - Manual (Page 22)

1-6 General Description
1.5 LSI53C895A Benefits Summary
This section of the chapter provides an overview of the LSI53C895A
features and benefits. It contains these topics:
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SCSI Performance
•
PCI Performance
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Integration
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Ease of Use
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Flexibility
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Reliability
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Testability
1.5.1 SCSI Performance
To improve SCSI performance, the LSI53C895A:
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Has integrated LVDlink universal transceivers which:
– Support SE, LVD, and HVD signals (with external transceivers).
– Allow greater device connectivity and longer cable length.
– Save the cost of external differential transceivers.
– Support a long-term performance migration path.
•
Bursts up to 512 bytes across the PCI bus through its 944 byte FIFO.
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Performs wide, Ultra2 SCSI synchronous transfers as fast as
80 Mbytes/s.
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Can handle phase mismatches in SCRIPTS without interrupting the
system processor, eliminating the need for CPU intervention during
an I/O disconnect/reselect sequence.
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Achieve Ultra2 SCSI transfer rates with an input frequency of 40 MHz
with the on-chip SCSI clock quadrupler.
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Includes 8 Kbytes internal RAM for SCRIPTS instruction storage.
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Has 31 levels of SCSI synchronous offset.
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Supports variable block size and scatter/gather data transfers.