Avago Technologies LSI53C895A - Manual (Page 188)

4-80 Registers
register) must be set for this bit to become active. The
LSI53C895A always generates parity when sending SCSI
data.
Register: 0x43
SCSI Interrupt Status One (SIST1)
Read Only
Reading the SIST1 register returns the status of the various interrupt
conditions, whether they are enabled in the
SCSI Interrupt Enable One
(SIEN1) register or not. Each bit that is set indicates an occurrence of
the corresponding condition.
Reading the SIST1 clears the interrupt condition.
R Reserved [7:5]
SBMC SCSI Bus Mode Change 4
This bit is set when the DIFFSENS pin detects a change
in voltage level that indicates the SCSI bus has switched
between SE, LVD or HVD modes.
R Reserved 3
STO Selection or Reselection Time-out 2
The SCSI device which the LSI53C895A is attempting to
select or reselect does not respond within the
programmed time-out period. See the description of the
SCSI Timer Zero (STIME0) register, bits [3:0], for more
information on the time-out timer.
GEN General Purpose Timer Expired 1
This bit is set when the general purpose timer expires.
The time measured is the time between enabling and
disabling of the timer. See the description of the
SCSI
Timer One (STIME1) register, bits [3:0], for more
information on the general purpose timer.
7 5 4 3 2 1 0
R SBMC R STO GEN HTH
x x x 0 x 0 0 0