Avago Technologies LSI53C896 User Manual
Page 201
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SCSI Registers
4-89
Version 3.3
Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
HTH[7:4], SEL[3:0],
GEN[3:0]
1
1. These values are correct if the CCF bits in the
register are set according to the
valid combinations in the bit description.
Minimum Time-out (50 MHz Clock)
2
2. 50 MHz clock is not supported for Ultra2 SCSI operation.
HTHSF = 0,
GENSF = 0
HTHSF = 1,
GENSF = 1
0000
Disabled
Disabled
0001
100
µ
s
1.6 ms
0010
200
µ
s
3.2 ms
0011
400
µ
s
6.4 ms
0100
800
µ
s
12.8 ms
0101
1.6 ms
25.6 ms
0110
3.2 ms
51.2 ms
0111
6.4 ms
1.5102.4 ms
1000
12.8 ms
204.8 ms
1001
25.6 ms
409.6 ms
1010
51.2 ms
819.2 ms
1011
102.4 ms
1.6 s
1100
204.8 ms
3.2 s
1101
409.6 ms
6.4 s
1110
819.2 ms
12.8 s
1111
1.6 s
25.6 s
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