Avago Technologies LSI53C896 - Manual (Page 342)

A-2 Register Summary
Version 3.3 Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
Max_Lat 0x3F Read Only 4-16
Min_Gnt 0x3E Read Only 4-15
Next Item Pointer 0x41 Read Only 4-16
Not Supported 0x0F – 4-9
Not Supported 0x24–0x27 – 4-10
Power Management Capabilities (PMC) 0x42–0x43 Read Only 4-17
Power Management Control/Status (PMCSR) 0x44–0x45 Read/Write 4-18
Reserved 0x28–0x2B – 4-10
Reserved 0x35–0x3B – 4-14
Revision ID (Rev ID) 0x08 Read Only 4-6
Status 0x06–0x07 Read/Write 4-5
Subsystem ID 0x2E–0x2F Read Only 4-12
Subsystem Vendor ID 0x2C–0x2D Read Only 4-11
Vendor ID 0x00–0x01 Read Only 4-2
SCSI Registers
Adder Sum Output (ADDER) 0x3C–0x3F Read Only 4-75
Chip Control 0 (CCNTL0) 0x56 Read/Write 4-101
Chip Control 1 (CCNTL1) 0x57 Read/Write 4-103
Chip Test Five (CTEST5) 0x22 Read/Write 4-63
Chip Test Four (CTEST4) 0x21 Read/Write 4-61
Chip Test One (CTEST1) 0x19 Read Only 4-56
Chip Test Six (CTEST6) 0x23 Read/Write 4-64
Chip Test Three (CTEST3) 0x1B Read/Write 4-58
Chip Test Two (CTEST2) 0x1A Read Only
(bit 3 write) 4-56
Chip Test Zero (CTEST0) 0x18 Read/Write 4-55
Table A.1 LSI53C896 Register Map (Cont.)
Register Name Address Read/Write Page