Avago Technologies LSI53C896 - Manual (Page 274)

6-6 Specifications
Version 3.3 Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
Table 6.9 Bidirectional Signals – AD[63:0], C_BE[7:0]/, FRAME/, IRDY/, TRDY/,
DEVSEL/, STOP/, PERR/, PAR, PAR64, REQ64/, ACK64/
Symbol Parameter Min Max Unit Test Conditions
V
IH
Input high voltage 0.5 V
DD
5.0 V –
V
IL
Input low voltage V
SS
-0.3 0.3 V
DD
V –
V
OH
Output high voltage 0.9 V
DD
– V
−
500
µ
A
V
OL
Output low voltage – 0.1 V
DD
V 1500
µ
A
V
OH
5 V Tolerant output high voltage 2.4 – V
−
16 mA
V
OL
5 V Tolerant output low voltage – 0.55 V 16 mA
I
OZ
3-state leakage
−
10 10
µ
A V
PIN
= 0 V, 5.25 V
I
PULL-DOWN
Pull down current
1
7.5 75
µ
A –
1. Pull-down test does not apply to AD[31:0] and C_BE[3:0]/.
Table 6.10 Input Signals – CLK, GNT/, IDSEL, INT_DIR, RST/, SCLK, TCK, TDI,
TEST_HSC
1
, TEST_RST/, TMS
1. TEST_HSC has a pull-down.
Symbol Parameter Min Max Unit Test Conditions
V
IH
Input high voltage 0.5 V
DD
5.0 V –
V
IL
Input low voltage V
SS
-0.3 0.3 V
DD
V –
I
IN
Input leakage
2
2. The Input leakage test does not apply to the TEST_RST/ pin with V
PIN
= 0 V.
−
10 10
µ
A V
PIN
= 0 V, 5.25 V
I
PULL-UP
3
3. Pull-up spec does not apply to: SCLK, CLK, GNT/, IDSEL, and RST/.
Pull up current
−
75
−
7.5
µ
A –