6 reliability, 7 testability, Reliability – Avago Technologies LSI53C896 User Manual

Page 28: Testability

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1-10

Introduction

Version 3.3

Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.

1.5.6 Reliability

The following features enhance the reliability of the LSI53C896:

•

2 kV ESD protection on SCSI signals.

•

Protection against bus reflections due to impedance mismatches.

•

Controlled bus assertion times (reduces RFI, improves reliability, and
eases FCC certification).

•

Latch-up protection greater than 150 mA.

•

Voltage feed-through protection (minimum leakage current through
SCSI pads).

•

More than 25% of pins are power and ground.

•

Power and ground isolation of I/O pads and internal chip logic.

•

TolerANT technology provides:

–

Active negation of SCSI Data, Parity, Request, and Acknowledge
signals for improved fast SCSI transfer rates.

–

Input signal filtering on SCSI receivers improves data integrity,
even in noisy cabling environments.

1.5.7 Testability

The following features enhance the testability of the LSI53C1010:

•

All SCSI signals accessible through programmed I/O.

•

SCSI loopback diagnostics.

•

SCSI bus signal continuity checking.

•

Support for single step mode operation.

•

JTAG boundary scan.

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