IBM POWERPC 750GL - Manual (Page 220)

User’s Manual
IBM PowerPC 750GX and 750GL RISC Microprocessor
Instruction Timing
Page 220 of 377
gx_06.fm.(1.2)
March 27, 2006
Figure 6-5. Instruction Timing—Cache Hit
6 fadd
1 fadd
0 add
10 11
8 add
1 2 3 4 5 6 7 8 0
Fetch (in IQ)
In dispatch entry (IQ0/IQ1)
Execute
2 add
3 fadd
9 add
4 b
10 add
11 add
12 fadd
9
7 fadd
•••
Complete (In CQ)
13 add
14 fadd
3
2
1
0
7
6
11
10
9
8
7
12
11
10
9
14
13
12
11
10
9
14
13
12
11
(16)
(15)
14
13
12
(17)
(16)
(15)
14
13
(18)
(17)
(16)
(15)
5
4
3
2
3
2
1
0
6
3
2
1
8
7
6
3
2
1
8
7
6
3
10
9
8
7
6
11
10
9
8
7
12
11
10
9
14
13
12
11
14
13
12
14
13
12
1
0
Instruction
Queue
Completion
Queue
5 fsub
In retirement entry (CQ0/CQ1)