Figure 10-1. 750gx power states, Table 10-1, 750gx microprocessor programmable power modes – IBM POWERPC 750GL User Manual

Page 336

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User’s Manual
IBM PowerPC 750GX and 750GL RISC Microprocessor

Power and Thermal Management

Page 336 of 377

gx_10.fm.(1.2)

March 27, 2006

Figure 10-1. 750GX Power States

Table 10-1. 750GX Microprocessor Programmable Power Modes

Power

Management

Mode

Functioning Units

Activation Method

Full-Power Wake Up Method

Full on

All units active

Doze

Bus snooping

Data cache as needed

Decrementer timer

Controlled by software

External asynchronous exceptions

1

Decrementer interrupt

Performance-monitor interrupt

Thermal-management interrupt
Hard or soft reset

Nap

Bus snooping (enabled by deas-
sertion of QACK)

Decrementer timer

Controlled by hardware and software

External asynchronous exceptions

1

Decrementer interrupt

Hard or soft reset

Sleep

None

Controlled by hardware and software

External asynchronous exceptions*

Hard or soft reset

1. Exceptions are referred to as interrupts in the architecture specification.

Full

On

Doze

Sleep

T1

T2

T3

T4

Nap

T5

T6

T7

T8

allow
snoop

T1: HID0(Doze) = 1 and MSR(POW) 0

1

T2: HRESET, SRESET, INT, SMI, MCP, DEC, PFM, machine-check interrupts, thermal-management interrupt
T3: HID0(Nap) = 1 and MSR(POW) 0

1

T4:HRESET, SRESET, INT, SMI, MCP, DEC
T5: HID0(Sleep) = 1 and MSR(POW) 0

1

T6: HRESET, SRESET, INT, SMI, MCP
T7: QACK 0

1

T8: QACK 1

0

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