Intel 80C188XL - Manual (Page 221)

INTERRUPT CONTROL UNIT
8-26
8.5.1.1 Interrupt Vector Register
The Interrupt Vector Register is used only in Slave mode. In Master mode, the interrupt vector
types are fixed; in Slave mode they are programmable. The Interrupt Vector Register is used to
specify the five most-significant bits of the interrupt vector type. The three least-significant bits
are fixed (Table 8-5).
Table 8-4. Interrupt Control Unit Register Comparison
Master Mode
Register Name
Slave Mode
Register Name
PCB Offset
Address
INT3 Control (not used) 3EH
INT2 Control (not used) 3CH
INT1 Control Timer 2 Control 3AH
INT0 Control Timer 1 Control 38H
DMA1 Control DMA1 Control 36H
DMA0 Control DMA0 Control 34H
Timer Control Timer 0 Control 32H
Interrupt Status Interrupt Status 30H
Interrupt Request Interrupt Request 2EH
In-Service In-Service 2CH
Priority Mask Priority Mask 2AH
Interrupt Mask Interrupt Mask 28H
Poll Status (not used) 26H
Poll (not used) 24H
EOI EOI 22H
(not used) Interrupt Vector 20H
Table 8-5. Slave Mode Fixed Interrupt Type Bits
Interrupt Source
Type Bits
2 1 0
Timer 0 0 0 0
(reserved) 0 0 1
DMA 0 0 1 0
DMA 1 0 1 1
Timer 1 1 0 0
Timer 2 1 0 1
(reserved) 1 1 0
(reserved) 1 1 1