Intel 80C188XL - Manual (Page 4)

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CONTENTS
CHAPTER 1
INTRODUCTION
1.1 HOW TO USE THIS MANUAL....................................................................................... 1-2
1.2 RELATED DOCUMENTS .............................................................................................. 1-3
1.3 ELECTRONIC SUPPORT SYSTEMS ........................................................................... 1-4
1.3.1 FaxBack Service .......................................................................................................1-4
1.3.2 Bulletin Board System (BBS) ....................................................................................1-5
1.3.2.1 How to Find ApBUILDER Software and Hypertext Documents on the BBS ...1-6
1.3.3 CompuServe Forums ................................................................................................1-6
1.3.4 World Wide Web .......................................................................................................1-6
1.4 TECHNICAL SUPPORT ................................................................................................ 1-6
1.5 PRODUCT LITERATURE.............................................................................................. 1-7
1.6 TRAINING CLASSES .................................................................................................... 1-7
CHAPTER 2
OVERVIEW OF THE 80C186 FAMILY ARCHITECTURE
2.1 ARCHITECTURAL OVERVIEW .................................................................................... 2-1
2.1.1 Execution Unit ...........................................................................................................2-2
2.1.2 Bus Interface Unit .....................................................................................................2-3
2.1.3 General Registers .....................................................................................................2-4
2.1.4 Segment Registers ...................................................................................................2-5
2.1.5 Instruction Pointer .....................................................................................................2-6
2.1.6 Flags .........................................................................................................................2-7
2.1.7 Memory Segmentation ..............................................................................................2-8
2.1.8 Logical Addresses ...................................................................................................2-10
2.1.9 Dynamically Relocatable Code ...............................................................................2-13
2.1.10 Stack Implementation .............................................................................................2-15
2.1.11 Reserved Memory and I/O Space ...........................................................................2-15
2.2 SOFTWARE OVERVIEW ............................................................................................ 2-17
2.2.1 Instruction Set .........................................................................................................2-17
2.2.1.1 Data Transfer Instructions .............................................................................2-18
2.2.1.2 Arithmetic Instructions ...................................................................................2-19
2.2.1.3 Bit Manipulation Instructions .........................................................................2-21
2.2.1.4 String Instructions ..........................................................................................2-22
2.2.1.5 Program Transfer Instructions .......................................................................2-23
2.2.1.6 Processor Control Instructions ......................................................................2-27
2.2.2 Addressing Modes ..................................................................................................2-27
2.2.2.1 Register and Immediate Operand Addressing Modes ...................................2-27
2.2.2.2 Memory Addressing Modes ...........................................................................2-28
2.2.2.3 I/O Port Addressing .......................................................................................2-36
2.2.2.4 Data Types Used in the 80C186 Modular Core Family .................................2-37