Intel 80C188XL - Manual (Page 380)

D-7
INSTRUCTION SET OPCODES AND CLOCK CYCLES
PROGRAM TRANSFER INSTRUCTIONS
Conditional Transfers — jump if:
JE/JZ= equal/zero 0 1 1 1 0 1 0 0 disp 4/13 (2)
JL/JNGE = less/not greater or equal 0 1 1 1 1 1 0 0 disp 4/13 (2)
JLE/JNG = less or equal/not greater 0 1 1 1 1 1 1 0 disp 4/13 (2)
JB/JNAE = below/not above or equal 0 1 1 1 0 0 1 0 disp 4/13 (2)
JC = carry 0 1 1 1 0 0 1 0 disp 4/13 (2)
JBE/JNA = below or equal/not above 0 1 1 1 0 1 1 0 disp 4/13 (2)
JP/JPE = parity/parity even 0 1 1 1 1 0 1 0 disp 4/13 (2)
JO = overflow 0 1 1 1 0 0 0 0 disp 4/13 (2)
JS = sign 0 1 1 1 1 0 0 0 disp 4/13 (2)
JNE/JNZ = not equal/not zero 0 1 1 1 0 1 0 1 disp 4/13 (2)
JNL/JGE = not less/greater or equal 0 1 1 1 1 1 0 1 disp 4/13 (2)
JNLE/JG = not less or equal/greater 0 1 1 1 1 1 1 1 disp 4/13 (2)
JNB/JAE = not below/above or equal 0 1 1 1 0 0 1 1 disp 4/13 (2)
JNC = not carry 0 1 1 1 0 0 1 1 disp 4/13 (2)
JNBE/JA = not below or equal/above 0 1 1 1 0 1 1 1 disp 4/13 (2)
JNP/JPO = not parity/parity odd 0 1 1 1 1 0 1 1 disp 4/13 (2)
JNO = not overflow 0 1 1 1 0 0 0 1 disp 4/13 (2)
JNS = not sign 0 1 1 1 1 0 0 1 disp 5/15 (2)
Unconditional Transfers
CALL = Call procedure
direct within segment 1 1 1 0 1 0 0 0 disp-low disp-high 15
reg/memory indirect within segment 1 1 1 1 1 1 1 1 mod 010 r/m 13/19
indirect intersegment 1 1 1 1 1 1 1 1 mod 011 r/m (mod ?11) 38
direct intersegment 1 0 0 1 1 0 1 0 segment offset 23
selector
Table D-2. Instruction Set Summary (Continued)
Function Format Clocks Notes
NOTES:
1.
Clock cycles are given for 8-bit/16-bit operations.
2. Clock cycles are given for jump not taken/jump taken.
3. Clock cycles are given for interrupt taken/interrupt not taken.
4. If TEST = 0
Shading indicates additions and enhancements to the 8086/8088 instruction set. See Appendix A, “80C186
Instruction Set Additions and Extensions,” for details.