Intel 80C188XL - Manual (Page 123)

BUS INTERFACE UNIT
3-42
Figure 3-35. Refresh Request During HOLD
The device requesting a bus hold must be able to detect a HLDA pulse that is one clock in dura-
tion. A bus lockup (hang) condition can result if the requesting device fails to detect the short
HLDA pulse and continues to wait for HLDA to be asserted while the BIU waits for HOLD to be
deasserted. The circuit shown in Figure 3-36 can be used to latch HLDA.
HLDA
CLKOUT
HOLD
NOTES:
1. HLDA is deasserted, signaling need to run refresh bus cycle.
2. External bus master terminates use of the bus.
3. HOLD deasserted.
4. Hold may be reasserted after one clock.
5. BIU runs refresh cycle.
1 4 3
AD15:0
DEN
A19:16
RD, WR,
BHE, S2:0
DT/R,
LOCK
5
5
2
A1061-0A