NXP Semiconductors P89LPC9321 UM10310 - Manual (Page 110)

UM10310 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
User manual Rev. 2 — 1 November 2010 110 of 139
NXP Semiconductors
UM10310
P89LPC9321 User manual
Row Fill: In this mode the addressed row (64 bytes, with address DEEADR[5:0] ignored)
is filled with the DEEDAT pattern. To erase the entire row to 00h or program the entire row
to FFh, write 00h or FFh to DEEDAT prior to row fill. Each row fill requires approximately
4 ms to complete.
Block Fill: In this mode all 512 bytes are filled with the DEEDAT pattern. To erase the block
to 00h or program the block to FFh, write 00h or FFh to DEEDAT prior to the block fill.
Prior to using this command EADR8 must be set = 1. Each Block Fill requires
approximately 4 ms to complete.
In any mode, after the operation finishes, the hardware will set EEIF bit. An interrupt can
be enabled via the IEN1.7 bit. If IEN1.7 and the EA bits are set, it will generate an interrupt
request. The EEIF bit will need to be cleared by software.
Data EEPROM program or erase will be blocked when V
DD
<2.4V (See Table 104 ).
EWERR1 and EWERR0 bits are used to indicate the write error for BOD EEPROM.
EWERR0 will be Set when V
DD
< 2.4V during program or erase operation to indicate the
previous operation may not be correct. EWERR1 will be Set when a program or erase is
requested and V
DD
<2.4V. Both can be cleared by power on reset, watchdog reset or
software write.
17.1 Data EEPROM read
A byte can be read via polling or interrupt:
1. Write to DEECON with ECTL1/ECTL0 (DEECON[5:4]) = ‘00’ and correct bit 8 address
to EADR8. (Note that if the correct values are already written to DEECON, there is no
need to write to this register.)
2. Without writing to the DEEDAT register, write address bits 7 to 0 to DEEADR.
3. If both the EIEE (IEN1.7) bit and the EA (IEN0.7) bit are logic 1s, wait for the Data
EEPROM interrupt then read/poll the EEIF (DEECON.7) bit until it is set to logic 1. If
EIEE or EA is logic 0, the interrupt is disabled, only polling is enabled.
4. Read the Data EEPROM data from the DEEDAT SFR.
Note that if DEEDAT is written prior to a write to DEEADR (if DEECON[5:4] = ‘00’), a Data
EEPROM write operation will commence. The user must take caution that such cases do
not occur during a read. An example is if the Data EEPROM is read in an interrupt service
routine with the interrupt occurring in the middle of a Data EEPROM cycle. The user
should disable interrupts during a Data EEPROM write operation (see
Section 17.2 ).
17.2 Data EEPROM write
A byte can be written via polling or interrupt:
1. Write to DEECON with ECTL1/ECTL0 (DEECON[5:4]) = ‘00’ and EWERR1/EWERR0
(DEECON[2:1]) =’00’ and correct bit 8 address to EADR8. (Note that if the correct
values are already written to DEECON, there is no need to write to this register.)
2. Write the data to the DEEDAT register.
3. Write address bits 7 to 0 to DEEADR.
4. Poll EWERR1 flag. If EWERR1 (DEECON.2) bit is logic 1, BOD EEPROM occurred
(V
DD
<2.4V) and Data EEPROM program is blocked.