NXP Semiconductors P89LPC9321 UM10310 - Manual (Page 48)

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User manual Rev. 2 — 1 November 2010 48 of 139
NXP Semiconductors
UM10310
P89LPC9321 User manual
9.3 Basic timer operation
The Timer is a free-running up/down counter counting at the pace determined by the
prescaler. The timer is started by setting the CCU Mode Select bits TMOD21 and
TMOD20 in the CCU Control Register 0 (TCR20) as shown in the table in the TCR20
register description (
Table 37 ).
The CCU direction control bit, TDIR2, determines the direction of the count. TDIR2 = 0:
Count up, TDIR2 = 1: Count down. If the timer counting direction is changed while the
counter is running, the count sequence will be reversed in the CCUCLK cycle following
the write of TDIR2. The timer can be written or read at any time and newly-written values
will take effect when the prescaler overflows. The timer is accessible through two SFRs,
TL2(low byte) and TH2(high byte). A third 16-bit SFR, TOR2H:TOR2L, determines the
overflow reload value. TL2, TH2 and TOR2H, TOR2L will be 0 after a reset
Up-counting: When the timer contents are FFFFH, the next CCUCLK cycle will set the
counter value to the contents of TOR2H:TOR2L.
Down-counting: When the timer contents are 0000H, the next CCUCLK cycle will set the
counter value to the contents of TOR2H:TOR2L. During the CCUCLK cycle when the
reload is performed, the CCU Timer Overflow Interrupt Flag (TOIF2) in the CCU Interrupt
Flag Register (TIFR2) will be set, and, if the EA bit in the IEN0 register and ECCU bit in
the IEN1 register (IEN1.4) are set, program execution will vector to the overflow interrupt.
The user has to clear the interrupt flag in software by writing a logic 0 to it.
When writing to the reload registers, TOR2H and TOR2L, the values written are stored in
two 8-bit shadow registers. In order to latch the contents of the shadow registers into
TOR2H and TOR2L, the user must write a logic 1 to the CCU Timer Compare/Overflow
Update bit TCOU2, in CCU Timer Control Register 1 (TCR21). The function of this bit
Fig 21. Capture Compare Unit block diagram.
16-BIT SHADOW REGISTER
TOR2H TO TOR2L 16-BIT SHADOW REGISTER
OCRxH TO OCRxL
16-BIT CAPTURE
REGISTER ICRxH, L
INTERRUPT FLAG
TICF2x SET
EVENT
COUNTER
NOISE
FILTER
ICNFx
EDGE
SELECT
ICESx
16-BIT COMPARE
VALUE
TIMER > COMPARE
16-BIT TIMER RELOAD
REGISTER
16-BIT UP/DOWN TIMER
WITH RELOAD
FCOx
OCA
ICA
ICB
OCB
OVERFLOW/
UNDERFLOW
OCC
OCD
COMPARE CHANNELS A TO D
CAPTURE CHANNELS A, B
002aab009
10-BIT DIVIDER
32 × PLL 4-BIT
DIVIDER