NXP Semiconductors P89LPC9321 UM10310 - Manual (Page 12)

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UM10
310
Al
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for
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pr
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ded
in
this
do
cum
ent i
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sub
jec
t to
leg
a
l d
is
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la
im
er
s.
©
NXP
B.V
. 2010.
Al
l r
ig
h
ts
r
e
s
e
rv
ed.
User m
a
nu
al
Rev
. 2
— 1 No
vemb
e
r 2010
12 of
139
N
X
P Semi
conductor
s
UM10310
P8
9L
PC
93
21
U
s
e
r ma
nu
a
l
DEEDAT Data EEPROM
data register F2H 00 0000 0000
DEEADR Data EEPROM
address
register F3H 00 0000 0000
DIVM CPU clock
divide-by-M
control 95H 00 0000 0000
DPTR Data pointer
(2 bytes)
DPH Data pointer
high 83H 00 0000 0000
DPL Data pointer
low 82H 00 0000 0000
FMADRH Program flash
address high E7H 00 0000 0000
FMADRL Program flash
address low E6H 00 0000 0000
FMCON Program flash
control (Read) E4H BUSY - - - HVA HVE SV OI 70 0111 0000
Program flash
control (Write) E4H FMCMD.7 FMCMD.6 FMCMD.5 FMCMD.4 FMCMD.3 FMCMD.2 FMCMD.1 FMCMD.0
FMDATA Program flash
data E5H 00 0000 0000
I2ADR I 2 C-bus slave
address
register
DBH I2ADR.6 I2ADR.5 I2ADR.4 I2ADR.3 I2ADR.2 I2ADR.1 I2ADR.0 GC 00 0000 0000
Bit address DF DE DD DC DB DA D9 D8
I2CON* I 2 C-bus control
register
D8H - I2EN STA STO SI AA - CRSEL 00 x000 00x0
I2DAT I 2 C-bus data
register
DAH
Table 2. Special function registers …continued
* indicates SFRs that are bit addressable.
Name Description SFR
addr. Bit functions and addresses Reset value
MSB LSB Hex Binary