8 framing error, 9 break detect, Figure 26 – NXP Semiconductors P89LPC9321 UM10310 User Manual
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UM10310
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User manual
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NXP Semiconductors
UM10310
P89LPC9321 User manual
10.8 Framing
error
A Framing error occurs when the stop bit is sensed as a logic 0. A Framing error is
reported in the status register (SSTAT). In addition, if SMOD0 (PCON.6) is 1, framing
errors can be made available in SCON.7. If SMOD0 is 0, SCON.7 is SM0. It is
recommended that SM0 and SM1 (SCON[7:6]) are programmed when SMOD0 is logic 0.
10.9 Break
detect
A break detect is reported in the status register (SSTAT). A break is detected when any 11
consecutive bits are sensed low. Since a break condition also satisfies the requirements
for a framing error, a break condition will also result in reporting a framing error. Once a
break condition has been detected, the UART will go into an idle state and remain in this
idle state until a stop bit has been received. The break detect can be used to reset the
device and force the device into ISP mode by setting the EBRR bit (AUXR1.6)
1
0
0
X
CCLK
⁄
32
1
X
CCLK
⁄
16
1
1
0
0
CCLK
⁄
(256-TH1)64
1
0
CCLK
⁄
(256-TH1)32
X
1
CCLK
⁄
((BRGR1,BRGR0)+16)
Table 53.
Baud Rate Generator Control register (BRGCON - address BDh) bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
--
-
-
-
-
-
SBRGS
BRGEN
Reset
x
x
x
x
x
x
0
0
Table 54.
Baud Rate Generator Control register (BRGCON - address BDh) bit description
Bit Symbol
Description
0
BRGEN
Baud Rate Generator Enable. Enables the baud rate generator. BRGR1 and
BRGR0 can only be written when BRGEN = 0.
1
SBRGS
Select Baud Rate Generator as the source for baud rates to UART in modes 1 and
3 (see
for details)
2:7 -
reserved
Fig 26. Baud rate generation for UART (Modes 1, 3)
Table 52.
UART baud rate generation
…continued
SCON.7
(SM0)
SCON.6
(SM1)
PCON.7
(SMOD1)
BRGCON.1
(SBRGS)
Receive/transmit baud rate for UART
baud rate modes 1 and 3
SBRGS = 1
SBRGS = 0
SMOD1 = 0
SMOD1 = 1
timer 1 overflow
(PCLK-based)
baud rate generator
(CCLK-based)
002aaa897
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