NXP Semiconductors P89LPC9321 UM10310 - Manual (Page 5)

UM10310 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
User manual Rev. 2 — 1 November 2010 5 of 139
NXP Semiconductors
UM10310
P89LPC9321 User manual
1.2 Pin description
Table 1. Pin description
Symbol Pin Type Description
P0.0 to P0.7 I/O Port 0: Port 0 is an 8-bit I/O port with a user-configurable output type. During reset
Port 0 latches are configured in the input only mode with the internal pull-up
disabled. The operation of Port 0 pins as inputs and outputs depends upon the
port configuration selected. Each port pin is configured independently. Refer to
Section 4.1 “Port configurations” for details.
The Keypad Interrupt feature operates with Port 0 pins.
All pins have Schmitt triggered inputs.
Port 0 also provides various special functions as described below:
P0.0/CMP2/ KBI0 3 I/O P0.0 — Port 0 bit 0.
O CMP2 — Comparator 2 output.
I KBI0 — Keyboard input 0.
P0.1/CIN2B/
KBI1 26 I/O P0.1 — Port 0 bit 1.
I CIN2B — Comparator 2 positive input B.
I KBI1 — Keyboard input 1.
P0.2/CIN2A/
KBI2 25 I/O P0.2 — Port 0 bit 2.
I CIN2A — Comparator 2 positive input A.
I KBI2 — Keyboard input 2.
P0.3/CIN1B/
KBI3 24 I/O P0.3 — Port 0 bit 3. High current source.
I CIN1B — Comparator 1 positive input B.
I KBI3 — Keyboard input 3.
P0.4/CIN1A/
KBI4 23 I/O P0.4 — Port 0 bit 4. High current source.
I CIN1A — Comparator 1 positive input A.
I KBI4 — Keyboard input 4.
I AD13 — ADC1 channel 3 analog input.
P0.5/CMPREF/
KBI5 22 I/O P0.5 — Port 0 bit 5. High current source.
I CMPREF — Comparator reference (negative) input.
I KBI5 — Keyboard input 5.
P0.6/CMP1/ KBI6 20 I/O P0.6 — Port 0 bit 6. High current source.
O CMP1 — Comparator 1 output.
I KBI6 — Keyboard input 6.
P0.7/T1/KBI7 19 I/O P0.7 — Port 0 bit 7. High current source.
I/O T1 — Timer/counter 1 external count input or overflow output.
I KBI7 — Keyboard input 7.
P1.0 to P1.7 I/O, I
[1]
Port 1: Port 1 is an 8-bit I/O port with a user-configurable output type, except for
three pins as noted below. During reset Port 1 latches are configured in the input
only mode with the internal pull-up disabled. The operation of the configurable
Port 1 pins as inputs and outputs depends upon the port configuration selected.
Each of the configurable port pins are programmed independently. Refer to
Section 4.1 “Port configurations” for details. P1.2 to P1.3 are open drain when
used as outputs. P1.5 is input only.
All pins have Schmitt triggered inputs.
Port 1 also provides various special functions as described below: