NXP Semiconductors P89LPC9321 UM10310 - Manual (Page 30)

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User manual Rev. 2 — 1 November 2010 30 of 139
NXP Semiconductors
UM10310
P89LPC9321 User manual
(Please refer to the P89LPC9321 data sheet, Dynamic characteristics for glitch filter
specifications).
4.3 Open drain output configuration
The open drain output configuration turns off all pull-ups and only drives the pull-down
transistor of the port pin when the port latch contains a logic 0. To be used as a logic
output, a port configured in this manner must have an external pull-up, typically a resistor
tied to V
DD
. The pull-down for this mode is the same as for the quasi-bidirectional mode.
The open drain port configuration is shown in Figure 11 .
An open drain port pin has a Schmitt-triggered input that also has a glitch suppression
circuit.
Please refer to the P89LPC9321 data sheet, Dynamic characteristics for glitch filter
specifications.
Fig 10. Quasi-bidirectional output.
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2 CPU
CLOCK DELAY
port latch
data
weak strong
input
data
very
weak
P P P
V DD
port
pin
glitch rejection
Fig 11. Open drain output.
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port latch
data
input
data
glitch rejection
port
pin