Nxp semiconductors – NXP Semiconductors P89LPC9321 UM10310 User Manual

Page 82

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UM10310

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User manual

Rev. 2 — 1 November 2010

82 of 139

NXP Semiconductors

UM10310

P89LPC9321 User manual

88H

Previously
addressed with
own SLA address;
Data has been
received; NACK
has been returned

Read data byte or 0

0

0

0

Switched to not addressed SLA
mode; no recognition of own SLA or
general address

read data byte

or

0

0

0

1

Switched to not addressed SLA
mode; Own SLA will be recognized;
general call address will be
recognized if I2ADR.0 = 1

read data byte

or

1

0

0

0

Switched to not addressed SLA
mode; no recognition of own SLA or
General call address. A START
condition will be transmitted when
the bus becomes free

read data byte

1

0

0

1

Switched to not addressed SLA
mode; Own slave address will be
recognized; General call address
will be recognized if I2ADR.0 = 1. A
START condition will be transmitted
when the bus becomes free.

90H

Previously
addressed with
General call; Data
has been
received; ACK
has been returned

Read data byte or x

0

0

0

Data byte will be received and NOT
ACK will be returned

read data byte

x

0

0

1

Data byte will be received and ACK
will be returned

98H

Previously
addressed with
General call; Data
has been
received; NACK
has been returned

Read data byte

0

0

0

0

Switched to not addressed SLA
mode; no recognition of own SLA or
General call address

read data byte

0

0

0

1

Switched to not addressed SLA
mode; Own slave address will be
recognized; General call address
will be recognized if I2ADR.0 = 1.

read data byte

1

0

0

0

Switched to not addressed SLA
mode; no recognition of own SLA or
General call address. A START
condition will be transmitted when
the bus becomes free.

read data byte

1

0

0

1

Switched to not addressed SLA
mode; Own slave address will be
recognized; General call address
will be recognized if I2ADR.0 = 1. A
START condition will be transmitted
when the bus becomes free.

Table 75.

Slave Receiver mode

…continued

Status code
(I2STAT)

Status of the I

2

C

hardware

Application software response

Next action taken by I

2

C

hardware

to/from I2DAT

to I2CON

STA

STO

SI

AA

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