Texas Instruments Digital Signal Processor SM320F2812-HT - Manual (Page 117)

XTIMING0
XTIMING1
XTIMING2
XTIMING6
XTIMING7
XBANK
LEAD/ACTIVE/TRAIL
1 †
0
XCLKOUT
/2
XTIMCLK 1 †
0
/2
C28x
CPU
XINTCNF2
(CLKMODE)
XINTCNF2
(XTIMCLK)
† Default Value after reset
SYSCLKOUT
XINTCNF2
(CLKOFF)
1
0
0
SM320F2812-HT
www.ti.com SGUS062B – JUNE 2009 – REVISED JUNE 2011
Table 6-33. XINTF Clock Configurations (continued)
MODE SYSCLKOUT XTIMCLK XCLKOUT
3 1/2 SYSCLKOUT 1/2 SYSCLKOUT
Example: 150 MHz 75 MHz 75 MHz
4 1/2 SYSCLKOUT 1/4 SYSCLKOUT
Example: 150 MHz 75 MHz 37.5 MHz
The relationship between SYSCLKOUT and XTIMCLK is shown in Figure 6-28 .
Figure 6-28. Relationship Between XTIMCLK and SYSCLKOUT
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