Texas Instruments Digital Signal Processor SM320F2812-HT - Manual (Page 39)

SM320F2812-HT
www.ti.com SGUS062B – JUNE 2009 – REVISED JUNE 2011
The operation and timing of the external interface, can be controlled by the registers listed in Table 3-8 .
Table 3-8. XINTF Configuration and Control Register Mappings
NAME ADDRESS SIZE ( × 16) DESCRIPTION
XINTF Timing Register, Zone 0 can access as two 16-bit registers or one 32-bit
XTIMING0 0x00 0B20 2
register
XINTF Timing Register, Zone 1 can access as two 16-bit registers or one 32-bit
XTIMING1 0x00 0B22 2
register
XINTF Timing Register, Zone 2 can access as two 16-bit registers or one 32-bit
XTIMING2 0x00 0B24 2
register
XINTF Timing Register, Zone 6 can access as two 16-bit registers or one 32-bit
XTIMING6 0x00 0B2C 2
register
XINTF Timing Register, Zone 7 can access as two 16-bit registers or one 32-bit
XTIMING7 0x00 0B2E 2
register
XINTF Configuration Register can access as two 16-bit registers or one 32-bit
XINTCNF2 0x00 0B34 2
register
XBANK 0x00 0B38 1 XINTF Bank Control Register
XREVISION 0x00 0B3A 1 XINTF Revision Register
3.5.1 Timing Registers
XINTF signal timing can be tuned to match specific external device requirements such as setup and hold
times to strobe signals for contention avoidance and maximizing bus efficiency. The timing parameters
can be configured individually for each zone. This allows the programmer to maximize the efficiency of the
bus, based on the type of memory or peripheral that the user needs to access. All XINTF timing values
are with respect to XTIMCLK, which is equal to or one-half of the SYSCLKOUT rate, as shown in Figure
6-27.
For detailed information on the XINTF timing and configuration register bit fields, see the TMS320x281x
DSP External Interface (XINTF) Reference Guide (
SPRU067 ).
3.5.2 XREVISION Register
The XREVISION register contains a unique number to identify the particular version of XINTF used in the
product. For the F2812, this register is configured as described in
Table 3-9 .
Table 3-9. XREVISION Register Bit Definitions
BIT(S) NAME TYPE RESET DESCRIPTION
Current XINTF Revision. For internal use/reference. Test purposes only.
15-0 REVISION R 0x0004
Subject to change.
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