Texas Instruments Digital Signal Processor SM320F2812-HT - Manual (Page 133)

SM320F2812-HT
www.ti.com SGUS062B – JUNE 2009 – REVISED JUNE 2011
Table 6-47. AC Specifications (1) (2)
T
A
= – 55 ° C to 125 ° C T
A
= 220 ° C
PARAMETER UNIT
MIN TYP MAX MIN TYP MAX
SINAD Signal-to-noise ratio + distortion 62 57 dB
SNR Signal-to-noise ratio 62 57 dB
THD Total harmonic distortion -68 -68 dB
ENOB (SNR) Effective number of bits 10.1 9.1 Bits
SFDR Spurious free dynamic range 69 68 dB
(1) Not production tested.
(2) Validated at the following conditions: ADC Input Frequency = 10.71 KHz, XCLKIN = 30 MHz, PLLCR = 0xA (SYSCLK = 150 MHz),
HSPCP = 3 (ADCCLK= 25 MHz), ADCCLKPS = 1 (ADCCLK= 12.5 MHz), CPS = 0 (ADCCLK =12.5 MHZ), ACQ_PS (SH) = 3
6.29.3 Current Consumption for Different ADC Configurations (at 25-MHz ADCCLK)
Table 6-48. Current Consumption (1)
I
DDA
(TYP) (2) I
DDAIO
(TYP) I
DD1
(TYP) ADC OPERATING MODE/CONDITIONS (3)
Mode A (Operational Mode):
40 mA 1 μ A 0.5 mA – BG and REF enabled
– PWD disabled
Mode B:
– ADC clock enabled
7 mA 0 5 μ A
– BG and REF enabled
– PWD enabled
Mode C:
– ADC clock enabled
1 μ A 0 5 μ A
– BG and REF disabled
– PWD enabled
Mode D:
– ADC clock disabled
1 μ A 0 0
– BG and REF disabled
– PWD enabled
(1) Not production tested.
(2) IDDA – includes current into V
DDA1
/ V
DDA2
and AV
DDREFBG
(3) Test Conditions: SYSCLKOUT = 150 MHz
ADC module clock = 25 MHz
ADC performing a continuous conversion of all 16 channels in Mode A
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