Texas Instruments Digital Signal Processor SM320F2812-HT User Manual

Page 19

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SM320F2812-HT

www.ti.com

SGUS062B

JUNE 2009

REVISED JUNE 2011

Table 2-3. Signal Descriptions

(1)

(continued)

PIN NO.

DIE PAD

DIE PAD

DIE PAD

NAME

X-CENTER

Y-CENTER

I/O/Z

(2)

PU/PD

(3)

DESCRIPTION

172-PIN

NO.

(

μ

m)

(

μ

m)

HFG

JTAG test reset with internal pulldown.
TRST, when driven high, gives the scan
system control of the operations of the
device. If this signal is not connected or
driven low, the device operates in its
functional mode, and the test reset signals
are ignored.

NOTE: Do not use pullup resistors on
TRST; it has an internal pulldown device. In
a low-noise environment, TRST can be left

TRST

132

148

42.6

4684.8

I

PD

floating. In a high-noise environment, an
additional pulldown resistor may be
needed. The value of this resistor should be
based on drive strength of the debugger
pods applicable to the design. A 2.2-k

resistor generally offers adequate
protection. Since this is application specific,
it is recommended that each target board is
validated for proper operation of the
debugger and the application.

TCK

133

149

42.6

4605.1

I

PU

JTAG test clock with internal pullup

JTAG test-mode select (TMS) with internal
pullup. This serial control input is clocked

TMS

123

139

872.5

5057.5

I

PU

into the TAP controller on the rising edge of
TCK.

JTAG test data input (TDI) with internal
pullup. TDI is clocked into the selected

TDI

128

144

350.4

5057.5

I

PU

register (instruction or data) on a rising
edge of TCK.

JTAG scan out, test data output (TDO). The
contents of the selected register (instruction

TDO

124

140

777.9

5057.5

O/Z

or data) is shifted out of TDO on the falling
edge of TCK.

Emulator pin 0. When TRST is driven high,
this pin is used as an interrupt to or from

EMU0

133

150

42.6

4525.3

I/O/Z

PU

the emulator system and is defined as
input/output through the JTAG scan.

Emulator pin 1. When TRST is driven high,
this pin is used as an interrupt to or from

EMU1

143

161

42.6

3430.9

I/O/Z

PU

the emulator system and is defined as
input/output through the JTAG scan.

Copyright

©

2009

2011, Texas Instruments Incorporated

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