6 serial communications interface (sci) module – Texas Instruments Digital Signal Processor SM320F2812-HT User Manual
Page 71
LSPCLK
,
(BRR 1) 8
+
·
LSPCLK
,
16
6
150 MHz
Max bit rate
9.375
10
b / s
2
8
=
=
´
´
SGUS062B
–
JUNE 2009
–
REVISED JUNE 2011
4.6
Serial Communications Interface (SCI) Module
The F2812 device include two serial communications interface (SCI) modules. The SCI modules support
digital communications between the CPU and other asynchronous peripherals that use the standard
non-return-to-zero (NRZ) format. The SCI receiver and transmitter are double-buffered, and each has its
own separate enable and interrupt bits. Both can be operated independently or simultaneously in the
full-duplex mode. To ensure data integrity, the SCI checks received data for break detection, parity,
overrun, and framing errors. The bit rate is programmable to over 65 000 different speeds through a 16-bit
baud-select register.
Features of each SCI module include:
•
Two external pins:
–
SCITXD: SCI transmit-output pin
–
SCIRXD: SCI receive-input pin
NOTE
Both pins can be used as GPIO if not used for SCI.
•
Baud rate programmable to 64K different rates
–
Baud rate
when BRR
≠
0
=
=
when BRR = 0
•
Data-word format
–
One start bit
–
Data-word length programmable from one to eight bits
–
Optional even/odd/no parity bit
–
One or two stop bits
•
Four error-detection flags: parity, overrun, framing, and break detection
•
Two wake-up multiprocessor modes: idle-line and address bit
•
Half- or full-duplex operation
•
Double-buffered receive and transmit functions
•
Transmitter and receiver operations can be accomplished through interrupt-driven or polled algorithms
with status flags.
–
Transmitter: TXRDY flag (transmitter-buffer register is ready to receive another character) andTX
EMPTY flag (transmitter-shift register is empty)
–
Receiver: RXRDY flag (receiver-buffer register is ready to receive another character), BRKDT flag
(break condition occurred), and RX ERROR flag (monitoring four interrupt conditions)
•
Separate enable bits for transmitter and receiver interrupts (except BRKDT)
•
•
NRZ (non-return-to-zero) format
•
Ten SCI module control registers located in the control register frame beginning at address 7050h
Copyright
©
2009
–
2011, Texas Instruments Incorporated
Peripherals
71
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