Zilog Z08470 - Manual (Page 150)

Z80 Instruction Set UM008007-0715
138
Z80 CPU
User Manual
Condition Bits Affected
S is set if result is negative; otherwise, it is reset.
Z is set if A equals (HL); otherwise, it is reset.
H is set if borrow from bit 4; otherwise, it is reset.
P/V is set if BC – 1 does not equal 0; otherwise, it is reset.
N is set.
C is not affected.
Example
If the HL register pair contains 1111h , the Accumulator contains F3h , the Byte Counter
contains 0007h , and memory locations contain the following data.
Upon the execution of a CPIR instruction, register pair HL contains 1114h , the Byte
Counter contains 0004h , the P/V flag in the F Register is set, and the Z flag in the F Reg-
ister is set.
(1111h) contains 52h
(1112h) contains 00h
(1113h) contains F3h