Zilog Z08470 - Manual (Page 153)

UM008007-0715 Z80 Instruction Description
Z80 CPU
User Manual
141
P/V is set if BC – 1 ≠ 0; otherwise, it is reset.
N is set.
C is not affected.
Example
The HL register pair contains 1118h , the Accumulator contains F3h , the Byte Counter
contains 0007h , and memory locations contain the following data.
Upon the execution of a CPDR instruction, register pair HL contains 1115h , the Byte
Counter contains 0004h , the P/V flag in the F Register is set, and the Z flag in the F Reg-
ister is set.
(1118h) contains 52h
(1117h) contains 00h
(1116h) contains F3h