Zilog Z08470 User Manual
Page 224
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Z80 Instruction Set
UM008007-0715
212
Z80 CPU
User Manual
Condition Bits Affected
S is set if result is negative; otherwise, it is reset.
Z is set if result is 0; otherwise, it is reset.
H is reset.
P/V is set if parity even; otherwise, it is reset.
N is reset.
C is data from bit 7 of source register.
Example
Register r contains the following data.
Upon the execution of an RLC r instruction, register r and the Carry flag now contain:
0
0
1
0
1
0
0
0
7
6
4
1
0
2
5
3
0
0
1
0
1
0
0
0
7
6
4
1
0
2
5
3
C
1
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