Zilog Z08470 - Manual (Page 76)

Z80 Instruction Set UM008007-0715
64
Z80 CPU
User Manual
Each of these two Flag registers contains 6 bits of status information that are set or cleared
by CPU operations; bits 3 and 5 are not used. Four of these bits (C, P/V, Z, and S) can be
tested for use with conditional JUMP, CALL, or RETURN instructions. The H and N flags
cannot be tested; these two flags are used for BCD arithmetic.
Carry Flag
The Carry Flag (C) is set or cleared depending on the operation being performed. For
ADD instructions that generate a Carry, and for SUB instructions that generate a Borrow,
the Carry Flag is set. The Carry Flag is reset by an ADD instruction that does not generate
a Carry, and by a SUB instruction that does not generate a Borrow. This saved Carry facil-
itates software routines for extended precision arithmetic. Additionally, the DAA instruc-
tion sets the Carry Flag if the conditions for making the decimal adjustment are met.
For the RLA, RRA, RLS, and RRS instructions, the Carry bit is used as a link between the
least-significant byte (LSB) and the most-significant byte (MSB) for any register or mem-
ory location. During the RLCA, RLC, and SLA instructions, the Carry flag contains the
final value shifted out of bit 7 of any register or memory location. During the RRCA,
RRC, SRA, and SRL instructions, the Carry flag contains the final value shifted out of bit
0 of any register or memory location.
For the logical instructions AND, OR, and XOR, the Carry flag is reset.
The Carry flag can also be set by the Set Carry Flag (SCF) instruction and complemented
by the Compliment Carry Flag (CCF) instruction.
Add/Subtract Flag
The Add/Subtract Flag (N) is used by the Decimal Adjust Accumulator instruction (DAA)
to distinguish between the ADD and SUB instructions. For ADD instructions, N is cleared
to 0. For SUB instructions, N is set to 1.
Table 21. Flag Definitions
Symbol Field Name
C Carry Flag
N Add/Subtract
P/V Parity/Overflow Flag
H Half Carry Flag
Z Zero Flag
S Sign Flag
X Not Used