Zilog Z08470 - Manual (Page 68)

Z80 CPU Instructions UM008007-0715
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Z80 CPU
User Manual
Register addressing can specify the Accumulator or any general-purpose register on which
an operation is to be performed. Register Indirect and Indexed addressing are available for
operations at external memory locations. Bit test operations set the Zero flag (Z) if the
tested bit is a 0.
Descriptions of the Bit Set, Reset, and Test Group instructions begin on page 240.
Jump, Call, and Return
Table 14 lists all of the jump, call, and return instructions implemented in the Z80 CPU. A
jump is a branch in a program in which the program counter is loaded with a 16-bit value
as specified by one of the three available addressing modes (Immediate Extended, Rela-
tive, or Register Indirect). In Table 14, the jump group includes several conditions that can
be specified before the jump is made. If these conditions are not met, the program merely
continues with the next sequential instruction. The conditions are all dependent on the data
in the Flag Register. The immediate extended addressing is used to jump to any location in
the memory. This instruction requires three bytes (i.e., two bytes designated to specifying
the 16-bit address), with the low-order address byte first, followed by the high-order
address byte.
An example of an unconditional jump to memory location 3E32h is shown in Figure 40.
The Relative Jump instruction uses only two bytes, the second byte is a signed two’s com-
plement displacement from the existing Program Counter. This displacement can be in the
range of +129 to –126 and is measured from the address of the instruction op code.
Figure 40. Example of an Unconditional Jump Sequence
Note:
Op Code
Address A
A+1
A+2
C3
32
3E
low-order Address
high-order Address