Zilog Z08470 User Manual
Page 170
Z80 Instruction Set
UM008007-0715
158
Z80 CPU
User Manual
r identifies registers B, C–, D, E, H, L, or A specified in the assembled object code field,
as follows:
Description
A logical OR operation is performed between the byte specified by the s operand and the
byte contained in the Accumulator; the result is stored in the Accumulator.
Condition Bits Affected
S is set if result is negative; otherwise, it is reset.
Z is set if result is 0; otherwise, it is reset.
H is reset.
P/V is set if overflow; otherwise, it is reset.
N is reset.
C is reset.
Example
If the H Register contains
48h
(
0100
0100
), and the Accumulator contains
12h
(
0001
0010
), then upon the execution of an OR H instruction, the Accumulator contains
5Ah
(
0101
1010
).
Register
r
B
000
C
001
D
010
E
011
H
100
L
101
A
111
Instruction
M Cycles
T States
4 MHz E.T.
OR r
1
4
1.00
OR n
2
7 (4, 3)
1.75
OR (HL)
2
7 (4, 3)
1.75
OR (IX+d)
5
19 (4, 4, 3, 5, 3)
4.75
OR (lY+d)
5
19 (4, 4, 3, 5, 3)
4.75