Zilog Z08470 - Manual (Page 78)

Z80 Instruction Set UM008007-0715
66
Z80 CPU
User Manual
During the CPI, CPIR, CPD, and CPDR search instructions and the LDI, LDIR, LDD, and
LDDR block transfer instructions, the P/V Flag monitors the state of the Byte Count (BC)
Register. When decrementing, if the byte counter decrements to 0, the flag is cleared to 0;
otherwise the flag is set to1.
During the LD A, I and LD A, R instructions, the P/V Flag is set with the value of the inter-
rupt enable flip-flop (IFF2) for storage or testing.
When inputting a byte from an I/O device with an IN r, (C) instruction, the P/V Flag is
adjusted to indicate data parity.
Half Carry Flag
The Half Carry Flag (H) is set (1) or cleared (0) depending on the Carry and Borrow status
between bits 3 and 4 of an 8-bit arithmetic operation. This flag is used by the Decimal
Adjust Accumulator (DAA) instruction to correct the result of a packed BCD add or sub-
tract operation. The H Flag is set (1) or cleared (0) as shown in Table 22.
Zero Flag
The Zero Flag (Z) is set (1) or cleared (0) if the result generated by the execution of certain
instructions is 0.
For 8-bit arithmetic and logical operations, the Z flag is set to a 1 if the resulting byte in
the Accumulator is 0. If the byte is not 0, the Z flag is reset to 0.
For Compare (search) instructions, the Z flag is set to 1 if the value in the Accumulator is
equal to the value in the memory location indicated by the value of the register pair HL.
When testing a bit in a register or memory location, the Z flag contains the complemented
state of the indicated bit (see Bit b, r in the
Bit Set, Reset, and Test Group section on page
240).
When inputting or outputting a byte between a memory location and an INI, IND, OUTI,
or OUTD I/O device, if the result of decrementing Register B is 0, then the Z flag is 1; oth-
erwise, the Z flag is 0. Additionally, for byte inputs from I/O devices using IN r, (C), the Z
flag is set to indicate a 0-byte input.
Table 22. Half Carry Flag Add/Subtract Operations
H Flag Add Subtract
1 A Carry occurs from bit 3 to bit 4 A Borrow from bit 4 occurs
0 No Carry occurs from bit 3 to bit 4 No Borrow from bit 4 occurs