Zilog Z08470 - Manual (Page 50)

Z80 CPU Instructions UM008007-0715
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Z80 CPU
User Manual
parentheses around the name of the register that is to be used as the pointer. For example,
the symbol (HL) specifies that the contents of the HL register are to be used as a pointer to
a memory location. Often Register Indirect addressing is used to specify 16-bit operands.
In this case, the register contents point to the lower order portion of the operand while the
register contents are automatically incremented to obtain the upper portion of the operand.
Bit Addressing
The Z80 contains a large number of bit set, reset, and test instructions. These instructions
allow any memory location or CPU register to be specified for a bit operation through one
of three previous addressing modes (register, Register Indirect, and indexed) while three
bits in the op code specify which of the eight bits is to be manipulated.
Addressing Mode Combinations
Many instructions include more than one operand (such as arithmetic instructions or
loads). In these cases, two types of addressing can be employed. For example, load can use
immediate addressing to specify the source and Register Indirect or indexed addressing to
specify the destination.
Instruction Op Codes
This section describes each of the Z80 instructions and provides tables listing the op codes
for every instruction. In each of these tables, the op codes in shaded areas are identical to
those offered in the 8080A CPU. Also depicted is the assembly language mnemonic that is
used for each instruction. All instruction op codes are listed in hexadecimal notation. Sin-
gle-byte op codes require two hex characters while double byte op codes require four hex
characters. For convenience, the conversion from hex to binary is repeated in Table 4.
Table 4. Hex, Binary, Decimal Conversion Table
Hex Binary Decimal
0 = 0000 = 0
1 = 0001 = 1
2 = 0010 = 2
3 = 0011 = 3
4 = 0100 = 4
5 = 0101 = 5
6 = 0110 = 6
7 = 0111 = 7