Table 7-26, Cpu status sensor, Control via ipmi – Artesyn CPCI-6200 Installation and Use (May 2015) User Manual
Page 170

Control via IPMI
CPCI-6200 Installation and Use (6806800J66E)
170
Entity ID
0x07
-
Sensor Type
0xD2
Artesyn-specific Discrete Digital
Event/Reading Type
0x6F
Discrete (sensor-specific)
Assertion Event Mask(Byte 15)
0x03
-
Assertion Event Mask(Byte 16)
0x00
-
Deassertion Event Mask(Byte 17)
0x03
-
Deassertion Event Mask(Byte 18)
0x00
-
Threshold Mask(Byte 19)
0x03
-
Threshold Mask(Byte 20)
0x00
-
Base Unit
0x00
(unspecified)
Rearm mode
0x01
Auto
Hysteresis Support
0x00
No Hysteresis or unspecified
Threshold Access Support
0x00
No Tresholds
Event Message Control
0x00
Per Threshold / Discrete State
Reading Definition
-
-
Table 7-26 CPU Status Sensor
Feature
Raw Value
Description
Sensor Name
CPU Status
-
Sensor LUN
0x00
-
Sensor Number
0x87
-
Entity ID
0x03
-
Sensor Type
0x07
Processor
Event/Reading Type
0x6F
Discrete (sensor-specific)
Assertion Event Mask(Byte 15)
0x02
-
Assertion Event Mask(Byte 16)
0x00
-
Assertion Events
-
-
Table 7-25 CPCI Signal Sensor (continued)
Feature
Raw Value
Description