12 nand flash chip 1 status register, Table 8-26, Table 8-27 – Artesyn CPCI-6200 Installation and Use (May 2015) User Manual
Page 204: Nand flash chip 1 status register, 0xf200_0013, Table 8-28, Nand flash chip 1 status register field definition
Advertising
Memory Maps and Addresses
CPCI-6200 Installation and Use (6806800J66E)
204
8.4.12 NAND Flash Chip 1 Status Register
Table 8-26 NAND Flash Chip 1 Presence Register Field Definition
C1P
Chip 1 Present
1
Chip 1 is installed on the board.
0
Chip 1 is not installed on the board.
RSVD
Reserved
Table 8-27 NAND Flash Chip 1 Status Register, 0xF200_0013
Bit
Field
Operation
Reset
7
RB1
R
1
6
RB2
R
1
5
RB3
R
1
4
RB4
R
1
3
RSVD
R
0
2
RSVD
R
0
1
RSVD
R
0
0
RSVD
R
0
Table 8-28 NAND Flash Chip 1 Status Register Field Definition
RB1
Ready/Busy 1
1
Device 1 is ready.
0
Device 1 is busy.
RB2
Ready/Busy 2
1
Device 2 is ready.
0
Device 2 is busy.
Advertising