Motorola ColdFire MCF5281 - Manual (Page 391)

General Purpose Timer Modules (GPTA and GPTB)
Freescale Semiconductor 20-23
NOTE
When the GPT channel 3 registers contain 0xFFFF and TCRE is set, TOF
does not get set even though the GPT counter registers go from 0xFFFF to
0x0000.
When the fast flag clear all bit, GPTSCR1[TFFCA], is set, any access to the
GPT counter registers clears GPT flag register 2.
When TOF is set, it does not inhibit future overflow events.
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3