Motorola ColdFire MCF5281 User Manual

Page 761

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Freescale Semiconductor

Index-13

address multiplexing 15-9
general guidelines 15-9

overview 15-1
registers

address and control 1–0 (DACRn) 15-6
control (DCR) 15-4
mask (DMRn) 15-8
mode register

initialization 15-23
settings 15-18

self-refresh 15-16
timing diagrams

read cycle 33-17
write cycle 33-18

timing specifications 33-17

Self-received frames 25-10
Signals

block diagram 14-2
bus

address bus (A23–0) 14-19
byte strobes (BS3–0) 14-19
chip select (CS6–0) 14-21
data (D31–0) 14-19
output enable (OE) 14-19
read/write (R/W) 14-20
summary 13-1
transfer acknowledge (TA) 14-19
transfer error acknowledge (TEA) 14-20
transfer in progress (TIP) 14-21
transfer size (SIZ1–0) 14-20
transfer start (TS) 14-20

chip configuration

CLKMOD1–0 9-5

chip configuration module

CLKMOD1–0 14-22

,

27-2

RCON 14-22

,

27-2

reset configuration override (D26–24, 21, 19–16) 27-3

chip select module

byte strobes (BS3–0) 12-1
chip select (CS6–0) 12-1
output enable (OE) 12-1

clock module

CLKMOD1–0 9-5
clock output (CLKOUT) 9-5

,

14-22

EXTAL 9-4

,

14-22

RSTOUTl 9-5
XTAL 9-5

,

14-22

debug

breakpoint (BKPT) 30-2
breakpoint/test mode select (BKPT/TMS) 14-30
CLKOUT 30-2
debug data (DDATA3–0) 14-31

,

30-2

development serial clock (DSCLK) 30-2

development serial clock/test reset

(DSCLK/TRST) 14-30

development serial input (DSI) 30-2
development serial input/test data (DSI/TDI) 14-30
development serial output (DSO) 30-2
development serial output/test data (DSO/TDO) 14-30
JTAG_EN 14-29
processor status (PST3–0) 30-2
processor status output (PST3–0) 14-31
test clock (TCLK) 14-30

description by pin 32-4
DMA timers

timer 0 input (DTIN0) 14-27
timer 0 output (DTOUT0) 14-27
timer 1 input (DTIN1) 14-27
timer 1 output (DTOUT1) 14-28
timer 2 input (DTIN2) 14-28
timer 2 output (DTOUT2) 14-28
timer 3 input (DTIN3) 14-28
timer 3 output (DTOUT3) 14-28

Ethernet

carrier receive sense (ECRS) 14-24
collision (ECOL) 14-24
management data (EMDIO) 14-23
management data clock (EMDC) 14-23
receive clock (ERXCLK) 14-24
receive data 0 (ERXDO) 14-24
receive data 3–1 (ERXD3–1) 14-24
receive data valid (ERXDV) 14-24
receive error (ERXER) 14-25
transmit clock (EXTCLK) 14-23
transmit data 0 (ETXD0) 14-23
transmit data 1–3 (ETXD3–1) 14-24
transmit enable (ETXEN) 14-23
transmit error (ETXER) 14-24

external boot mode 14-18
FlexCAN

receive (CANRX) 14-25
transmit (CANTX) 14-25

general purpose timers

external clock input (SYNCx) 14-27

,

20-4

GPTB3–0 14-27
GPTn2–0 20-3
GPTn3 20-3
GPTx3–0 14-27

I

2

C

serial clock (SCL) 14-26
serial data (SDA) 14-26

interrupts

IRQ7–1 14-23

JTAG

JTAG_EN 31-2
TCLK 31-3

MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3

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