Motorola ColdFire MCF5281 User Manual

Page 575

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Queued Analog-to-Digital Converter (QADC)

Freescale Semiconductor

28-37

The following paragraphs and figures outline the prioritizing criteria used to determine which conversion
occurs in each overlap situation.

NOTE

Each situation in

Figure 28-23

through

Figure 28-33

is labeled S1 through

S19. In each diagram, time is shown increasing from left to right. The
execution of queue 1 and queue 2 (Q1 and Q2) is shown as a string of
rectangles representing the execution time of each CCW in the queue. In
most of the situations, there are four CCWs (labeled C1 to C4) in both queue
1 and queue 2. In some of the situations, CCW C2 is presumed to have the
pause bit set, to show the similarities of pause and end-of-queue as
terminations of queue execution.

Trigger events are described in

Table 28-22

.

When a trigger event causes a CCW execution in progress to be aborted, the aborted conversion is shown
as a ragged end of a shortened CCW rectangle.

The situation diagrams also show when key status bits are set.

Table 28-23

describes the status bits.

Below the queue execution flows are three sets of blocks that show the status information that is made
available to the user. The first two rows of status blocks show the condition of each queue as:

Idle

Active

Pause

Suspended (queue 2 only)

Trigger pending

The third row of status blocks shows the 4-bit QS status register field that encodes the condition of the two
queues. Two transition status cases, QS = 0011 and QS = 0111, are not shown because they exist only very
briefly between stable status conditions.

Table 28-22. Trigger Events

Trigger

Events

T1

Events that trigger queue 1 execution (external trigger, software-initiated single-scan
enable bit, or completion of the previous continuous loop)

T2

Events that trigger queue 2 execution (external trigger, software-initiated single-scan
enable bit, timer period/interval expired, or completion of the previous continuous
loop)

Table 28-23. Status Bits

Bit

Function

CF flag

Set when the end of the queue is reached

PF flag

Set when a queue completes execution up through a pause bit

Trigger overrun

error (TOR)

Set when a new trigger event occurs before the queue is finished
servicing the previous trigger event

MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3

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