Motorola ColdFire MCF5281 User Manual
Page 740
Revision History
B-4
Freescale Semiconductor
Changed equation in PRES_DIV field description to the following:
Added “Note:
When Flash security is enabled, the chip will boot in single chip mode regardless
of the external reset configuration.”
Changed equation in QPR field description to the following:
Multiplied all f
SYS
divisor values in this table by 2.
Added “Note: Enabling Flash security will disable BDM communications.”
Replaced “SCKE” with “SCKE.”
Replaced “PEL2” with “PEL6, ” “PNQ6” with “PNQ7,” “PNQ5” with “PNQ6,” “PEL5” with “PEL1,” “PNQ4”
with “PNQ5,” “PNQ3” with “PNQ4,” “PNQ2” with “PNQ3,” “PNQ1” with “PNQ2,” “PNQ0” with “PNQ1,”
“PQS0” with “PQS1,” “PQS1” with “PQS0,” “PJ6” with “PJ7,” “RAS0” with “SDRAM_CS0,” “RAS1” with
“SDRAM_CS1,” and “SCKE” with “SCKE.”
Changed value for “ESD Target for Human Body Model” to “2000” and “ESD Target for Machine Model”
to “200.”
Changed value in “Maximum number of guaranteed program/erase cycles before failure” row to “10,000.”
Changed the max value in specs B6a–B6c to “0.5t
CYC
+ 10.”
Changed the min value in spec B7a to “0.5t
CYC
+ 2” and reflected the change in
,
Changed the min value in spec D8 to “2” and the max value to”'—”.
Changed the max value in spec G1a to “12.”
Added the following footnote: “Because of long delays associated with the PQA/PQB pads, signals on the
PQA/PQB pins will be updated on the following edge of the clock.”
Table B-2. Rev. 0.1 to Rev. 1 Changes (continued)
Location
Description
S-clock
f
SYS
2 PRESDIV + 1
(
)
---------------------------------------------
=
f
QCLK
=
f
SYS
2(QPR[6:0] + 1)
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3